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	<title>Comments on: The End Of The HPC Server (As We Know It)</title>
	<atom:link href="http://www.linux-mag.com/id/7810/feed/" rel="self" type="application/rss+xml" />
	<link>http://www.linux-mag.com/id/7810/</link>
	<description>Open Source, Open Standards</description>
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		<title>By: laytonjb</title>
		<link>http://www.linux-mag.com/id/7810/#comment-8520</link>
		<dc:creator>laytonjb</dc:creator>
		<pubDate>Wed, 30 Nov -0001 00:00:00 +0000</pubDate>
		<guid isPermaLink="false">http://www.linux-mag.com/id/7810/#comment-8520</guid>
		<description>&lt;p&gt;Doug,&lt;/p&gt;
&lt;p&gt;The last several columns have been great! I really enjoy the examination of the traditional higher-power CPUs and the new \&quot;cloud\&quot; oriented lower-power processors. Really cool stuff.&lt;/p&gt;
&lt;p&gt;I hope your wife understands all the noise when you start cutting up the chips. I recommend a Dremel tool and good work gloves (don\&#039;t forget to ground yourself).&lt;/p&gt;
&lt;p&gt;Keep them coming!&lt;/p&gt;
&lt;p&gt;Thanks!&lt;/p&gt;
&lt;p&gt;Jeff
&lt;/p&gt;
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		<content:encoded><![CDATA[<p>Doug,</p>
<p>The last several columns have been great! I really enjoy the examination of the traditional higher-power CPUs and the new \&#8221;cloud\&#8221; oriented lower-power processors. Really cool stuff.</p>
<p>I hope your wife understands all the noise when you start cutting up the chips. I recommend a Dremel tool and good work gloves (don\&#8217;t forget to ground yourself).</p>
<p>Keep them coming!</p>
<p>Thanks!</p>
<p>Jeff</p>
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		<title>By: kalloyd</title>
		<link>http://www.linux-mag.com/id/7810/#comment-8521</link>
		<dc:creator>kalloyd</dc:creator>
		<pubDate>Wed, 30 Nov -0001 00:00:00 +0000</pubDate>
		<guid isPermaLink="false">http://www.linux-mag.com/id/7810/#comment-8521</guid>
		<description>&lt;p&gt;Doug,&lt;/p&gt;
&lt;p&gt;The traditional configuration of CPU exclusive nodes with combinations of Ethernet and Infiniband can be \&quot;repurposed\&quot; to management and distribution functions to and between the compute nodes. These \&quot;sergeant\&quot; nodes become intermediaries between the head and compute nodes.  &lt;/p&gt;
&lt;p&gt;The idea is to balance high power consumption with lower duty cycles given the various throughput bandwidths.  In other words, it is a balancing act.&lt;/p&gt;
&lt;p&gt;Oh, and have a good time tweaking the hardware, Sparky!&lt;/p&gt;
&lt;p&gt;Ken
&lt;/p&gt;
</description>
		<content:encoded><![CDATA[<p>Doug,</p>
<p>The traditional configuration of CPU exclusive nodes with combinations of Ethernet and Infiniband can be \&#8221;repurposed\&#8221; to management and distribution functions to and between the compute nodes. These \&#8221;sergeant\&#8221; nodes become intermediaries between the head and compute nodes.  </p>
<p>The idea is to balance high power consumption with lower duty cycles given the various throughput bandwidths.  In other words, it is a balancing act.</p>
<p>Oh, and have a good time tweaking the hardware, Sparky!</p>
<p>Ken</p>
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		<title>By: margravezakhur</title>
		<link>http://www.linux-mag.com/id/7810/#comment-8522</link>
		<dc:creator>margravezakhur</dc:creator>
		<pubDate>Wed, 30 Nov -0001 00:00:00 +0000</pubDate>
		<guid isPermaLink="false">http://www.linux-mag.com/id/7810/#comment-8522</guid>
		<description>&lt;p&gt;Hmmm,&lt;/p&gt;
&lt;p&gt;You might want to look at the Cell Broadband Engine.  It is too expensive in its current incarnations for most independent developers (now that the OS of the PS3 no longer allows a second OS), but 18 cores with division of labor and 2.5Mb Cache for each core is interesting, especially since the access to main memory has been moved to the software side (where it may belong for purposes of efficiency).  The design seems to work rather well, and some HPCs were built off of a single worldly node and a bunch of PS3s not too long ago.
&lt;/p&gt;
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		<content:encoded><![CDATA[<p>Hmmm,</p>
<p>You might want to look at the Cell Broadband Engine.  It is too expensive in its current incarnations for most independent developers (now that the OS of the PS3 no longer allows a second OS), but 18 cores with division of labor and 2.5Mb Cache for each core is interesting, especially since the access to main memory has been moved to the software side (where it may belong for purposes of efficiency).  The design seems to work rather well, and some HPCs were built off of a single worldly node and a bunch of PS3s not too long ago.</p>
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		<title>By: x95tobos</title>
		<link>http://www.linux-mag.com/id/7810/#comment-8523</link>
		<dc:creator>x95tobos</dc:creator>
		<pubDate>Wed, 30 Nov -0001 00:00:00 +0000</pubDate>
		<guid isPermaLink="false">http://www.linux-mag.com/id/7810/#comment-8523</guid>
		<description>&lt;p&gt;Trying hard not to be rude, but having fuzzy memories on VLSI topics and CPU design, and without ANY pictures of the process, this seems complete BS to me- OK, a good gedanken experiment, in the spirit of Albert Einstein, but I\&#039;ll have to see you using a \&quot;sharp saw\&quot; to cut a chip with submilimeter features like vias and so on, in order to believe it, no matter how good your soldering skills may be.
&lt;/p&gt;
</description>
		<content:encoded><![CDATA[<p>Trying hard not to be rude, but having fuzzy memories on VLSI topics and CPU design, and without ANY pictures of the process, this seems complete BS to me- OK, a good gedanken experiment, in the spirit of Albert Einstein, but I\&#8217;ll have to see you using a \&#8221;sharp saw\&#8221; to cut a chip with submilimeter features like vias and so on, in order to believe it, no matter how good your soldering skills may be.</p>
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		<title>By: markhahn</title>
		<link>http://www.linux-mag.com/id/7810/#comment-8524</link>
		<dc:creator>markhahn</dc:creator>
		<pubDate>Wed, 30 Nov -0001 00:00:00 +0000</pubDate>
		<guid isPermaLink="false">http://www.linux-mag.com/id/7810/#comment-8524</guid>
		<description>&lt;p&gt;isn&#039;t the question really about programming models?  the Cuda model is pretty clumsy, and I&#039;m guessing Fusion will still have separate x86 and GPU universes.  to me, the goal should be to provide a reasonable programming model (x86_64 isn&#039;t bad, since no one really pays attention to instruction encoding anymore) that leverages the kind of stackless minicores that GPUs provide.  in other words, CPU architects should be asking &quot;how can I add a bunch of lighter-weight threads to _extend_ our conventional architecture&quot;.  I don&#039;t think there&#039;s anything magic about how GPUs are implemented except that the omit all the fancy dynamic scheduling, OoO, renaming etc that conventional CPUs use to make non-streaming code go fast.  even if there are sticking points (say, CPU and streaming sides differing in how they want to do caching), it seems like there could be fairly simple workarounds (2MB streaming pages?)
&lt;/p&gt;
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		<content:encoded><![CDATA[<p>isn&#8217;t the question really about programming models?  the Cuda model is pretty clumsy, and I&#8217;m guessing Fusion will still have separate x86 and GPU universes.  to me, the goal should be to provide a reasonable programming model (x86_64 isn&#8217;t bad, since no one really pays attention to instruction encoding anymore) that leverages the kind of stackless minicores that GPUs provide.  in other words, CPU architects should be asking &#8220;how can I add a bunch of lighter-weight threads to _extend_ our conventional architecture&#8221;.  I don&#8217;t think there&#8217;s anything magic about how GPUs are implemented except that the omit all the fancy dynamic scheduling, OoO, renaming etc that conventional CPUs use to make non-streaming code go fast.  even if there are sticking points (say, CPU and streaming sides differing in how they want to do caching), it seems like there could be fairly simple workarounds (2MB streaming pages?)</p>
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